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ST19NA18
Smartcard MCU with MAP, IART, High Speed CPU Clock & 18 KBytes High Density EEPROM
Data Brief
Features summary
ST19NA18 applications include: Pay TV, Banking and Secure applications
Hardware and dedicated software

Enhanced 8-bit CPU with extended addressing modes 128 Kbytes User ROM with partitioning 4 Kbytes User RAM with partitioning 18 Kbytes User EEPROM with partitioning, 64 Bytes User OTP and 64 Bytes ST OTP areas: - Highly reliable CMOS EEPROM submicron technology - Error Correction Code for single bit fail correction within a byte - 10-year data retention - 500,000 Erase/Write cycles endurance - Erase or Program 1 to 64 Bytes in 1.5 ms Three 8-bit timers with interrupt capability 3V and 5V supply voltage ranges Power-saving Standby mode Serial access I/Os, ISO 7816-3 compatible ISO Asynchronous Receiver Transmitter for high speed serial data support ESD protection greater than 5000 V
259a.ai
Micromodule

Wafer

Security features
Very high security features including: - EEPROM Flash programming - Clock management - User ROM protected area - Code signature capability - Built-in DFA countermeasures - Glitch detector Security firewalls for memories, MAP and Enhanced DES accelerator Hardware Security Enhanced DES accelerator with library support for symmetrical algorithms: - DES, 3 DES computations and CBC mode
AES-128 software library 1088-bit Modular Arithmetic Processor with library support for asymmetrical algorithms - Fast modular multiplication and squaring using Montgomery method - Software Crypto libraries in separate ST ROM area for efficient algorithm coding using a set of advanced functions - Software selectable operand length up to 2176 bits ISO 3309 CRC calculation block FIPS 140-2 and AIS31 compliant True Random Number Generator (TRNG) with two TRNG registers Unique serial number on each die High performance provided using high speed internal clock frequency (up to 28 MHz) Cryptographic performances (1) - RSA 1024-bit signature with CRT(2): 39 ms - RSA 1024-bit signature without CRT(2): 130 ms - RSA 1024-bit verification (e='$10001'): 2.4 ms - RSA 1024-bit key generation: 1.2 s - RSA 2048-bit signature with CRT(2): 264 ms - RSA 2048-bit verification (e='$10001'): 42 ms - Triple DES (with enhanced security): 27 s - Single DES (with enhanced security): 20 s
1. Typical values, independent from external clock frequency and supply voltage. 2. CRT: Chinese Remainder Theorem.
February 2007
DB_19NA18/0702 Rev 3
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www.st.com 1
For further information contact your local STMicroelectronics sales office.
Description
ST19NA18
1
Description
The product, member of the ST19N platform, is a serial access microcontroller specially designed for cost-effective secure portable applications. It is manufactured using an advanced highly reliable ST CMOS EEPROM technology. It is based on the STMicroelectronics 8-bit CPU already implemented on the ST19X product family and includes on-chip memories: User ROM, User RAM and EEPROM with state-ofthe-art security features. ROM, RAM and EEPROM memories can be configured into partitions with customized access rules. An additional ST ROM contains all ST provided functions and libraries. Access from any memory area to another are protected by hardware firewalls. Access rules are user-defined and can be selected by mask options. The chip includes an Enhanced DES accelerator which is accessible via cryptographic software libraries located in ST ROM. The chip includes a Modular Arithmetic Processor (MAP) based on a 1088-bit processor architecture. It processes modular multiplication, squaring and additional operand calculations up to 2176 bits. The Internal MAP and Enhanced DES accelerator are designed to speed up cryptographic calculations using Public Key Algorithms and Secret Key Algorithms. As with the other ST19N products, two serial interfaces compatible with the ISO 7816 standard are available. A CRC calculation block is also available and is directly accessible by the User.
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Software development
Software development and firmware generation (ROM and options) are supported by a comprehensive set of development tools, dedicated at development and validation of software:

Smartcard ICs Emulator ScDevTools environment for WindowsTM NT, 2000, and XP based stations Powerful C/C++ compiler and debugger are also available (third-party tools)
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ST19NA18 Figure 1. Block diagram
Revision history
RAM
EEPROM
User ROM
ST ROM and Crypto Library
EDES Accelerator
MAP
Memory Access Firewall
ST and User ROM, MAP and DES Firewall
Internal Bus
CRC Module
Clock Generator Module
3X 8-bit Timers
Security Administration
True Random Number Generator
8-bit CPU
2 Serial I/O Interfaces
IART
CLK
RESET
Vcc
GND
I/O0
I/O1
558
2
Revision history
Table 1.
Date 14-Nov-2005 31-Jan-2006 23-Feb-2007
Summary of modifications
Reference 1 2 3 Initial release. Disclaimer updated. Reformatted document. Description of modifications
DB_19NA18/0702
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ST19NA18
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